Commit Graph

4182 Commits (sio)
 

Author SHA1 Message Date
Connor McLaughlin 4aca52cdf4 CPU: Silence some debug spam 6 years ago
Connor McLaughlin 6aa36c2ead SPU: Hook up DMA reads/writes to RAM 6 years ago
Connor McLaughlin 575a3b36f5 CDROM: Store the image path/current lba as part of the save state 6 years ago
Connor McLaughlin 1276241622 SPU: Create stub needed for DMA to work 6 years ago
Connor McLaughlin 7a413b4031 CDROM: Proper handling of request register 6 years ago
Connor McLaughlin 4bb8fb211d DMA: Delay transfer/interrupt 6 years ago
Connor McLaughlin 4cc83e2228 DMA: Implement interrupts 6 years ago
Connor McLaughlin db777fdabb CDROM: Various fixes 6 years ago
Connor McLaughlin 1f13c4ad2c Pad: Fix long transmit delay breaking other things 6 years ago
Connor McLaughlin d65c9b3592 CDROM: Read timing and demute command, seek on ReadN 6 years ago
Connor McLaughlin 20f14688ca System: Support loading expansion ROMs 6 years ago
Connor McLaughlin 5d1c12c9ad Pad: Fix timing issues w/ BIOS 6 years ago
Connor McLaughlin 734d1a7ee1 InterruptController: Masked interrupts are still set in the status register 6 years ago
Connor McLaughlin fbd7fcec48 GTE: Implement NCDS (but incorrectly) 6 years ago
Connor McLaughlin f2d62fcce0 CDROM: Hack timings to get further with booting 6 years ago
Connor McLaughlin c772047715 GTE: Add AVSZ3/AVSZ4 6 years ago
Connor McLaughlin 005b06ae0c GTE: More implementation work, Reg+NCLIP+STR tests passing 6 years ago
Connor McLaughlin 3fb08a72a4 CDROM: Hack around missing pregap in images 6 years ago
Connor McLaughlin 948ac50020 CPU: Refactoring, implement LWC/SWC 6 years ago
Connor McLaughlin 2875a22987 CDROM: Reads appear to be functioning 6 years ago
Connor McLaughlin c988af453c Refactor timing to allow sync/updates in the middle of a slice 6 years ago
Connor McLaughlin ad316162f3 Basic timer implementation 6 years ago
Connor McLaughlin ad652c47ed Basic CD image loading 6 years ago
Connor McLaughlin 53e755aa68 Pad: Save state support 6 years ago
Connor McLaughlin 8cd75a4937 PAD: Basic support for digital controllers 6 years ago
Connor McLaughlin d84bffead1 GPU: Implement transparency mode 6 years ago
Connor McLaughlin 23ef1cafbd GPU: Force 16-bit precision when filling VRAM, clear mask bit 6 years ago
Connor McLaughlin d8150c996b GPU: Support dumping copies out to file 6 years ago
Connor McLaughlin e40ac7cee1 dep: Add stb_image_write 6 years ago
Connor McLaughlin 4d624946d6 GPU: Texpage attribute can change texture mode too 6 years ago
Connor McLaughlin 4d4ab898c0 GPU: Flush rendering before VRAM->VRAM copies 6 years ago
Connor McLaughlin 2c07db6dd5 GPU: Flush rendering before VRAM reads 6 years ago
Connor McLaughlin 4d38213f23 GPU: Implement VRAM-to-VRAM copies 6 years ago
Connor McLaughlin ff83f15abe dep: Add missing file 6 years ago
Connor McLaughlin 0a8bce8936 GPU: Hook up vblank interrupt 6 years ago
Connor McLaughlin a84b3d7a2b CPU: Fix interrupts in branch delay slots messing up PC 6 years ago
Connor McLaughlin 4025d6e4a6 GTE: Stub and register read/write function 6 years ago
Connor McLaughlin 6df8d42480 CDROM: Add missing fields to save state 6 years ago
Connor McLaughlin e3c6035152 CDROM: Implement get version and getstat commands 6 years ago
Connor McLaughlin b951f27381 CDROM: Stub implementation 6 years ago
Connor McLaughlin a0e7dff37c common: Add a FIFOQueue helper class 6 years ago
Connor McLaughlin 2128a2984b Add interrupt controller emulation 6 years ago
Connor McLaughlin c615e007c0 GPU: Serialization for CRTC state 6 years ago
Connor McLaughlin f47688b61f System: Basic timings for GPU scanout 6 years ago
Connor McLaughlin 9475c281bd Build: Set /MP on projects which are missing it 6 years ago
Connor McLaughlin 540f282213 CPU: Fix incorrect exception vector for break 6 years ago
Connor McLaughlin 5babc076f5 Bitfield: Fix incorrect shift in operator<<= 6 years ago
Connor McLaughlin d58dbe04c0 CPU: Fix load delay register reads for same register in delay slot 6 years ago
Connor McLaughlin 1bb794dd39 GPU: Use max vertex count based on buffer size 6 years ago
Connor McLaughlin a58b687352 GPU: Cap batch sizes at 1024 vertices, flush if exceeded 6 years ago