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Memory: Use a table based lookup scheme to read from memory regions

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pull/8/head
Yuri Kunde Schlesner 11 years ago
parent 52158c1b8d
commit dd4430609a
5 changed files with 174 additions and 128 deletions
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1
src/core/CMakeLists.txt
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@ -212,6 +212,7 @@ set(HEADERS
loader/ncch.h loader/ncch.h
mem_map.h mem_map.h
memory.h memory.h
memory_setup.h
settings.h settings.h
system.h system.h
) )

25
src/core/mem_map.cpp
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@ -7,8 +7,11 @@
#include "common/common_types.h" #include "common/common_types.h"
#include "common/logging/log.h" #include "common/logging/log.h"
#include "core/hle/config_mem.h"
#include "core/hle/shared_page.h"
#include "core/mem_map.h" #include "core/mem_map.h"
#include "core/memory.h" #include "core/memory.h"
#include "core/memory_setup.h"
//////////////////////////////////////////////////////////////////////////////////////////////////// ////////////////////////////////////////////////////////////////////////////////////////////////////
@ -26,18 +29,19 @@ namespace {
struct MemoryArea { struct MemoryArea {
u8** ptr; u8** ptr;
size_t size; u32 base;
u32 size;
}; };
// We don't declare the IO regions in here since its handled by other means. // We don't declare the IO regions in here since its handled by other means.
static MemoryArea memory_areas[] = { static MemoryArea memory_areas[] = {
{&g_exefs_code, PROCESS_IMAGE_MAX_SIZE}, {&g_exefs_code, PROCESS_IMAGE_VADDR, PROCESS_IMAGE_MAX_SIZE},
{&g_heap, HEAP_SIZE }, {&g_heap, HEAP_VADDR, HEAP_SIZE },
{&g_shared_mem, SHARED_MEMORY_SIZE }, {&g_shared_mem, SHARED_MEMORY_VADDR, SHARED_MEMORY_SIZE },
{&g_heap_linear, LINEAR_HEAP_SIZE }, {&g_heap_linear, LINEAR_HEAP_VADDR, LINEAR_HEAP_SIZE },
{&g_vram, VRAM_SIZE }, {&g_vram, VRAM_VADDR, VRAM_SIZE },
{&g_dsp_mem, DSP_RAM_SIZE }, {&g_dsp_mem, DSP_RAM_VADDR, DSP_RAM_SIZE },
{&g_tls_mem, TLS_AREA_SIZE }, {&g_tls_mem, TLS_AREA_VADDR, TLS_AREA_SIZE },
}; };
/// Represents a block of memory mapped by ControlMemory/MapMemoryBlock /// Represents a block of memory mapped by ControlMemory/MapMemoryBlock
@ -132,9 +136,14 @@ VAddr PhysicalToVirtualAddress(const PAddr addr) {
} }
void Init() { void Init() {
InitMemoryMap();
for (MemoryArea& area : memory_areas) { for (MemoryArea& area : memory_areas) {
*area.ptr = new u8[area.size]; *area.ptr = new u8[area.size];
MapMemoryRegion(area.base, area.size, *area.ptr);
} }
MapMemoryRegion(CONFIG_MEMORY_VADDR, CONFIG_MEMORY_SIZE, (u8*)&ConfigMem::config_mem);
MapMemoryRegion(SHARED_PAGE_VADDR, SHARED_PAGE_SIZE, (u8*)&SharedPage::shared_page);
LOG_DEBUG(HW_Memory, "initialized OK, RAM at %p", g_heap); LOG_DEBUG(HW_Memory, "initialized OK, RAM at %p", g_heap);
} }

243
src/core/memory.cpp
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@ -1,7 +1,10 @@
// Copyright 2014 Citra Emulator Project // Copyright 2015 Citra Emulator Project
// Licensed under GPLv2 or any later version // Licensed under GPLv2 or any later version
// Refer to the license.txt file included. // Refer to the license.txt file included.
#include <array>
#include "common/assert.h"
#include "common/common_types.h" #include "common/common_types.h"
#include "common/logging/log.h" #include "common/logging/log.h"
#include "common/swap.h" #include "common/swap.h"
@ -14,126 +17,134 @@
namespace Memory { namespace Memory {
template <typename T> const u32 PAGE_MASK = PAGE_SIZE - 1;
inline void Read(T &var, const VAddr vaddr) { const int PAGE_BITS = 12;
// TODO: Figure out the fastest order of tests for both read and write (they are probably different).
// TODO: Make sure this represents the mirrors in a correct way. enum class PageType {
// Could just do a base-relative read, too.... TODO /// Page is unmapped and should cause an access error.
Unmapped,
// Kernel memory command buffer /// Page is mapped to regular memory. This is the only type you can get pointers to.
if (vaddr >= TLS_AREA_VADDR && vaddr < TLS_AREA_VADDR_END) { Memory,
var = *((const T*)&g_tls_mem[vaddr - TLS_AREA_VADDR]); /// Page is mapped to a I/O region. Writing and reading to this page is handled by functions.
Special,
// ExeFS:/.code is loaded here };
} else if ((vaddr >= PROCESS_IMAGE_VADDR) && (vaddr < PROCESS_IMAGE_VADDR_END)) {
var = *((const T*)&g_exefs_code[vaddr - PROCESS_IMAGE_VADDR]); /**
* A (reasonably) fast way of allowing switchable and remmapable process address spaces. It loosely
// FCRAM - linear heap * mimics the way a real CPU page table works, but instead is optimized for minimal decoding and
} else if ((vaddr >= LINEAR_HEAP_VADDR) && (vaddr < LINEAR_HEAP_VADDR_END)) { * fetching requirements when acessing. In the usual case of an access to regular memory, it only
var = *((const T*)&g_heap_linear[vaddr - LINEAR_HEAP_VADDR]); * requires an indexed fetch and a check for NULL.
*/
// FCRAM - application heap struct PageTable {
} else if ((vaddr >= HEAP_VADDR) && (vaddr < HEAP_VADDR_END)) { static const size_t NUM_ENTRIES = 1 << (32 - PAGE_BITS);
var = *((const T*)&g_heap[vaddr - HEAP_VADDR]);
/**
// Shared memory * Array of memory pointers backing each page. An entry can only be non-null if the
} else if ((vaddr >= SHARED_MEMORY_VADDR) && (vaddr < SHARED_MEMORY_VADDR_END)) { * corresponding entry in the `attributes` array is of type `Memory`.
var = *((const T*)&g_shared_mem[vaddr - SHARED_MEMORY_VADDR]); */
std::array<u8*, NUM_ENTRIES> pointers;
// Config memory
} else if ((vaddr >= CONFIG_MEMORY_VADDR) && (vaddr < CONFIG_MEMORY_VADDR_END)) { /**
const u8* raw_memory = (const u8*)&ConfigMem::config_mem; * Array of fine grained page attributes. If it is set to any value other than `Memory`, then
var = *((const T*)&raw_memory[vaddr - CONFIG_MEMORY_VADDR]); * the corresponding entry in `pointer` MUST be set to null.
*/
// Shared page std::array<PageType, NUM_ENTRIES> attributes;
} else if ((vaddr >= SHARED_PAGE_VADDR) && (vaddr < SHARED_PAGE_VADDR_END)) { };
const u8* raw_memory = (const u8*)&SharedPage::shared_page;
var = *((const T*)&raw_memory[vaddr - SHARED_PAGE_VADDR]); /// Singular page table used for the singleton process
static PageTable main_page_table;
// DSP memory /// Currently active page table
} else if ((vaddr >= DSP_RAM_VADDR) && (vaddr < DSP_RAM_VADDR_END)) { static PageTable* current_page_table = &main_page_table;
var = *((const T*)&g_dsp_mem[vaddr - DSP_RAM_VADDR]);
static void MapPages(u32 base, u32 size, u8* memory, PageType type) {
// VRAM LOG_DEBUG(HW_Memory, "Mapping %p onto %08X-%08X", memory, base * PAGE_SIZE, (base + size) * PAGE_SIZE);
} else if ((vaddr >= VRAM_VADDR) && (vaddr < VRAM_VADDR_END)) {
var = *((const T*)&g_vram[vaddr - VRAM_VADDR]); u32 end = base + size;
} else { while (base != end) {
LOG_ERROR(HW_Memory, "unknown Read%lu @ 0x%08X", sizeof(var) * 8, vaddr); ASSERT_MSG(base < PageTable::NUM_ENTRIES, "out of range mapping at %08X", base);
if (current_page_table->attributes[base] != PageType::Unmapped) {
LOG_ERROR(HW_Memory, "overlapping memory ranges at %08X", base * PAGE_SIZE);
}
current_page_table->attributes[base] = type;
current_page_table->pointers[base] = memory;
base += 1;
memory += PAGE_SIZE;
} }
} }
template <typename T> void InitMemoryMap() {
inline void Write(const VAddr vaddr, const T data) { main_page_table.pointers.fill(nullptr);
main_page_table.attributes.fill(PageType::Unmapped);
// Kernel memory command buffer }
if (vaddr >= TLS_AREA_VADDR && vaddr < TLS_AREA_VADDR_END) {
*(T*)&g_tls_mem[vaddr - TLS_AREA_VADDR] = data;
// ExeFS:/.code is loaded here
} else if ((vaddr >= PROCESS_IMAGE_VADDR) && (vaddr < PROCESS_IMAGE_VADDR_END)) {
*(T*)&g_exefs_code[vaddr - PROCESS_IMAGE_VADDR] = data;
// FCRAM - linear heap
} else if ((vaddr >= LINEAR_HEAP_VADDR) && (vaddr < LINEAR_HEAP_VADDR_END)) {
*(T*)&g_heap_linear[vaddr - LINEAR_HEAP_VADDR] = data;
// FCRAM - application heap
} else if ((vaddr >= HEAP_VADDR) && (vaddr < HEAP_VADDR_END)) {
*(T*)&g_heap[vaddr - HEAP_VADDR] = data;
// Shared memory
} else if ((vaddr >= SHARED_MEMORY_VADDR) && (vaddr < SHARED_MEMORY_VADDR_END)) {
*(T*)&g_shared_mem[vaddr - SHARED_MEMORY_VADDR] = data;
// VRAM void MapMemoryRegion(VAddr base, u32 size, u8* target) {
} else if ((vaddr >= VRAM_VADDR) && (vaddr < VRAM_VADDR_END)) { ASSERT_MSG((size & PAGE_MASK) == 0, "non-page aligned size: %08X", size);
*(T*)&g_vram[vaddr - VRAM_VADDR] = data; ASSERT_MSG((base & PAGE_MASK) == 0, "non-page aligned base: %08X", base);
MapPages(base / PAGE_SIZE, size / PAGE_SIZE, target, PageType::Memory);
}
// DSP memory void MapIoRegion(VAddr base, u32 size) {
} else if ((vaddr >= DSP_RAM_VADDR) && (vaddr < DSP_RAM_VADDR_END)) { ASSERT_MSG((size & PAGE_MASK) == 0, "non-page aligned size: %08X", size);
*(T*)&g_dsp_mem[vaddr - DSP_RAM_VADDR] = data; ASSERT_MSG((base & PAGE_MASK) == 0, "non-page aligned base: %08X", base);
MapPages(base / PAGE_SIZE, size / PAGE_SIZE, nullptr, PageType::Special);
}
//} else if ((vaddr & 0xFFFF0000) == 0x1FF80000) { template <typename T>
// ASSERT_MSG(MEMMAP, false, "umimplemented write to Configuration Memory"); T Read(const VAddr vaddr) {
//} else if ((vaddr & 0xFFFFF000) == 0x1FF81000) { const u8* page_pointer = current_page_table->pointers[vaddr >> PAGE_BITS];
// ASSERT_MSG(MEMMAP, false, "umimplemented write to shared page"); if (page_pointer) {
return *reinterpret_cast<const T*>(page_pointer + (vaddr & PAGE_MASK));
}
// Error out... PageType type = current_page_table->attributes[vaddr >> PAGE_BITS];
} else { switch (type) {
LOG_ERROR(HW_Memory, "unknown Write%lu 0x%08X @ 0x%08X", sizeof(data) * 8, (u32)data, vaddr); case PageType::Unmapped:
LOG_ERROR(HW_Memory, "unmapped Read%lu @ 0x%08X", sizeof(T) * 8, vaddr);
return 0;
case PageType::Memory:
ASSERT_MSG(false, "Mapped memory page without a pointer @ %08X", vaddr);
case PageType::Special:
LOG_ERROR(HW_Memory, "I/O reads aren't implemented yet @ %08X", vaddr);
return 0;
default:
UNREACHABLE();
} }
} }
u8 *GetPointer(const VAddr vaddr) { template <typename T>
// Kernel memory command buffer void Write(const VAddr vaddr, const T data) {
if (vaddr >= TLS_AREA_VADDR && vaddr < TLS_AREA_VADDR_END) { u8* page_pointer = current_page_table->pointers[vaddr >> PAGE_BITS];
return g_tls_mem + (vaddr - TLS_AREA_VADDR); if (page_pointer) {
*reinterpret_cast<T*>(page_pointer + (vaddr & PAGE_MASK)) = data;
// ExeFS:/.code is loaded here return;
} else if ((vaddr >= PROCESS_IMAGE_VADDR) && (vaddr < PROCESS_IMAGE_VADDR_END)) { }
return g_exefs_code + (vaddr - PROCESS_IMAGE_VADDR);
// FCRAM - linear heap
} else if ((vaddr >= LINEAR_HEAP_VADDR) && (vaddr < LINEAR_HEAP_VADDR_END)) {
return g_heap_linear + (vaddr - LINEAR_HEAP_VADDR);
// FCRAM - application heap
} else if ((vaddr >= HEAP_VADDR) && (vaddr < HEAP_VADDR_END)) {
return g_heap + (vaddr - HEAP_VADDR);
// Shared memory
} else if ((vaddr >= SHARED_MEMORY_VADDR) && (vaddr < SHARED_MEMORY_VADDR_END)) {
return g_shared_mem + (vaddr - SHARED_MEMORY_VADDR);
// VRAM PageType type = current_page_table->attributes[vaddr >> PAGE_BITS];
} else if ((vaddr >= VRAM_VADDR) && (vaddr < VRAM_VADDR_END)) { switch (type) {
return g_vram + (vaddr - VRAM_VADDR); case PageType::Unmapped:
LOG_ERROR(HW_Memory, "unmapped Write%lu 0x%08X @ 0x%08X", sizeof(data) * 8, (u32) data, vaddr);
return;
case PageType::Memory:
ASSERT_MSG(false, "Mapped memory page without a pointer @ %08X", vaddr);
case PageType::Special:
LOG_ERROR(HW_Memory, "I/O writes aren't implemented yet @ %08X", vaddr);
return;
default:
UNREACHABLE();
}
}
} else { u8* GetPointer(const VAddr vaddr) {
LOG_ERROR(HW_Memory, "unknown GetPointer @ 0x%08x", vaddr); u8* page_pointer = current_page_table->pointers[vaddr >> PAGE_BITS];
return 0; if (page_pointer) {
return page_pointer + (vaddr & PAGE_MASK);
} }
LOG_ERROR(HW_Memory, "unknown GetPointer @ 0x%08x", vaddr);
return nullptr;
} }
u8* GetPhysicalPointer(PAddr address) { u8* GetPhysicalPointer(PAddr address) {
@ -141,27 +152,19 @@ u8* GetPhysicalPointer(PAddr address) {
} }
u8 Read8(const VAddr addr) { u8 Read8(const VAddr addr) {
u8 data = 0; return Read<u8>(addr);
Read<u8>(data, addr);
return data;
} }
u16 Read16(const VAddr addr) { u16 Read16(const VAddr addr) {
u16_le data = 0; return Read<u16_le>(addr);
Read<u16_le>(data, addr);
return data;
} }
u32 Read32(const VAddr addr) { u32 Read32(const VAddr addr) {
u32_le data = 0; return Read<u32_le>(addr);
Read<u32_le>(data, addr);
return data;
} }
u64 Read64(const VAddr addr) { u64 Read64(const VAddr addr) {
u64_le data = 0; return Read<u64_le>(addr);
Read<u64_le>(data, addr);
return data;
} }
void Write8(const VAddr addr, const u8 data) { void Write8(const VAddr addr, const u8 data) {

4
src/core/memory.h
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@ -8,6 +8,10 @@
namespace Memory { namespace Memory {
/**
* Page size used by the ARM architecture. This is the smallest granularity with which memory can
* be mapped.
*/
const u32 PAGE_SIZE = 0x1000; const u32 PAGE_SIZE = 0x1000;
/// Physical memory regions as seen from the ARM11 /// Physical memory regions as seen from the ARM11

29
src/core/memory_setup.h
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@ -0,0 +1,29 @@
// Copyright 2015 Citra Emulator Project
// Licensed under GPLv2 or any later version
// Refer to the license.txt file included.
#pragma once
#include "common/common_types.h"
namespace Memory {
void InitMemoryMap();
/**
* Maps an allocated buffer onto a region of the emulated process address space.
*
* @param base The address to start mapping at. Must be page-aligned.
* @param size The amount of bytes to map. Must be page-aligned.
* @param target Buffer with the memory backing the mapping. Must be of length at least `size`.
*/
void MapMemoryRegion(VAddr base, u32 size, u8* target);
/**
* Maps a region of the emulated process address space as a IO region.
* @note Currently this can only be used to mark a region as being IO, since actual memory-mapped
* IO isn't yet supported.
*/
void MapIoRegion(VAddr base, u32 size);
}
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