shader: Stub VOTE.VTG

src/shader_recompiler/frontend/ir/ir_emitter.cpp

@@ -256,6 +256,13 @@ static U1 GetFlowTest(IREmitter& ir, FlowTest flow_test) {
         return ir.LogicalOr(ir.GetSFlag(), ir.GetZFlag());
     case FlowTest::RGT:
         return ir.LogicalAnd(ir.LogicalNot(ir.GetSFlag()), ir.LogicalNot(ir.GetZFlag()));
+    case FlowTest::CSM_TA:
+    case FlowTest::CSM_TR:
+    case FlowTest::CSM_MX:
+    case FlowTest::FCSM_TA:
+    case FlowTest::FCSM_TR:
+    case FlowTest::FCSM_MX:
+        return ir.Imm1(false);
     default:
         throw NotImplementedException("Flow test {}", flow_test);
     }

src/shader_recompiler/frontend/maxwell/translate/impl/move_special_register.cpp

@@ -95,6 +95,10 @@ enum class SpecialRegister : u64 {
         return ir.WorkgroupIdY();
     case SpecialRegister::SR_CTAID_Z:
         return ir.WorkgroupIdZ();
+    case SpecialRegister::SR_WSCALEFACTOR_XY:
+        return ir.Imm32(Common::BitCast<u32>(1.0f));
+    case SpecialRegister::SR_WSCALEFACTOR_Z:
+        return ir.Imm32(Common::BitCast<u32>(1.0f));
     default:
         throw NotImplementedException("S2R special register {}", special_register);
     }

src/shader_recompiler/frontend/maxwell/translate/impl/not_implemented.cpp

@@ -329,10 +329,6 @@ void TranslatorVisitor::VADD(u64) {
     ThrowNotImplemented(Opcode::VADD);
 }
 
-void TranslatorVisitor::VOTE_vtg(u64) {
-    ThrowNotImplemented(Opcode::VOTE_vtg);
-}
-
 void TranslatorVisitor::VSET(u64) {
     ThrowNotImplemented(Opcode::VSET);
 }

src/shader_recompiler/frontend/maxwell/translate/impl/vote.cpp

@@ -49,4 +49,8 @@ void TranslatorVisitor::VOTE(u64 insn) {
     Vote(*this, insn);
 }
 
+void TranslatorVisitor::VOTE_vtg(u64) {
+    // Stub
+}
+
 } // namespace Shader::Maxwell