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@ -46,16 +46,6 @@ enum
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MMU_V3_FLUSH_TLB = 5,
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MMU_V3_FLUSH_TLB_ENTRY = 6,
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MMU_V3_FLUSH_CACHE = 7,
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// MMU Intel SA-1100
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MMU_SA_RB_OPS = 9,
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MMU_SA_DEBUG = 14,
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MMU_SA_CP15_R15 = 15,
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// Intel xscale CP15
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XSCALE_CP15_CACHE_TYPE = 0,
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XSCALE_CP15_AUX_CONTROL = 1,
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XSCALE_CP15_COPRO_ACCESS = 15,
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};
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// Reads data in big/little endian format based on the
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