GPU: Implement display disable command GP1(03h)

src/core/gpu.cpp

@@ -524,6 +524,14 @@ void GPU::WriteGP1(u32 value)
     }
     break;
 
+    case 0x03: // Display on/off
+    {
+      const bool disable = ConvertToBoolUnchecked(value & 0x01);
+      Log_DebugPrintf("Display %s", disable ? "disabled" : "enabled");
+      m_GPUSTAT.display_disable = disable;
+    }
+    break;
+
     case 0x04: // DMA Direction
     {
       m_GPUSTAT.dma_direction = static_cast<DMADirection>(param);
@@ -776,7 +784,7 @@ void GPU::DrawDebugStateWindow()
     ImGui::Text("Dot Clock Divider: %u", cs.dot_clock_divider);
     ImGui::Text("Vertical Interlace: %s (%s field)", m_GPUSTAT.vertical_interlace ? "Yes" : "No",
                 m_GPUSTAT.interlaced_field ? "odd" : "even");
-    ImGui::Text("Display Enable: %s", m_GPUSTAT.display_enable ? "Yes" : "No");
+    ImGui::Text("Display Disable: %s", m_GPUSTAT.display_disable ? "Yes" : "No");
     ImGui::Text("Drawing Even Line: %s", m_GPUSTAT.drawing_even_line ? "Yes" : "No");
     ImGui::NewLine();
 

src/core/gpu.h

@@ -284,7 +284,7 @@ protected:
     BitField<u32, bool, 20, 1> pal_mode;
     BitField<u32, bool, 21, 1> display_area_color_depth_24;
     BitField<u32, bool, 22, 1> vertical_interlace;
-    BitField<u32, bool, 23, 1> display_enable;
+    BitField<u32, bool, 23, 1> display_disable;
     BitField<u32, bool, 24, 1> interrupt_request;
     BitField<u32, bool, 25, 1> dma_data_request;
     BitField<u32, bool, 26, 1> ready_to_recieve_cmd;

src/core/gpu_hw_opengl.cpp

@@ -399,9 +399,13 @@ void GPU_HW_OpenGL::UpdateDisplay()
     const u32 flipped_vram_offset_y = VRAM_HEIGHT - vram_offset_y - display_height;
     const u32 scaled_flipped_vram_offset_y = m_vram_texture->GetHeight() - scaled_vram_offset_y - scaled_display_height;
 
-    // fast path when both interlacing and 24-bit depth is off
+    if (m_GPUSTAT.display_disable)
-    if (!m_GPUSTAT.display_area_color_depth_24 && !m_GPUSTAT.vertical_interlace)
+    {
+      m_system->GetHostInterface()->SetDisplayTexture(nullptr, 0, 0, 0, 0, m_crtc_state.display_aspect_ratio);
+    }
+    else if (!m_GPUSTAT.display_area_color_depth_24 && !m_GPUSTAT.vertical_interlace)
     {
+      // fast path when both interlacing and 24-bit depth is off
       glCopyImageSubData(m_vram_texture->GetGLId(), GL_TEXTURE_2D, 0, scaled_vram_offset_x,
                          scaled_flipped_vram_offset_y, 0, m_display_texture->GetGLId(), GL_TEXTURE_2D, 0, 0, 0, 0,
                          scaled_display_width, scaled_display_height, 1);

src/core/gpu_sw.cpp

@@ -127,7 +127,12 @@ void GPU_SW::UpdateDisplay()
                                    VRAM_HEIGHT - vram_offset_y);
     display_aspect_ratio = m_crtc_state.display_aspect_ratio;
 
-    if (m_GPUSTAT.display_area_color_depth_24)
+    if (m_GPUSTAT.display_disable)
+    {
+      m_system->GetHostInterface()->SetDisplayTexture(nullptr, 0, 0, 0, 0, display_aspect_ratio);
+      return;
+    }
+    else if (m_GPUSTAT.display_area_color_depth_24)
     {
       CopyOut24Bit(m_vram.data() + vram_offset_y * VRAM_WIDTH + vram_offset_x, VRAM_WIDTH,
                    m_display_texture_buffer.data(), display_width, display_width, display_height);