mirror of https://github.com/yuzu-mirror/yuzu
shader: Implement I2F
ReinUsesLisp
4 years ago
committed by
ameerj
parent
c97d03efb9
commit
f91859efd2
@ -0,0 +1,173 @@
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// Copyright 2021 yuzu Emulator Project
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// Licensed under GPLv2 or any later version
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// Refer to the license.txt file included.
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#include "common/bit_field.h"
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#include "common/common_types.h"
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#include "shader_recompiler/frontend/maxwell/translate/impl/common_encoding.h"
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#include "shader_recompiler/frontend/maxwell/translate/impl/impl.h"
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namespace Shader::Maxwell {
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namespace {
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enum class FloatFormat : u64 {
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F16 = 1,
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F32 = 2,
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F64 = 3,
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};
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enum class IntFormat : u64 {
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U8 = 0,
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U16 = 1,
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U32 = 2,
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U64 = 3,
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};
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union Encoding {
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u64 raw;
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BitField<0, 8, IR::Reg> dest_reg;
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BitField<8, 2, FloatFormat> float_format;
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BitField<10, 2, IntFormat> int_format;
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BitField<13, 1, u64> is_signed;
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BitField<39, 2, FpRounding> fp_rounding;
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BitField<41, 2, u64> selector;
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BitField<47, 1, u64> cc;
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BitField<45, 1, u64> neg;
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BitField<49, 1, u64> abs;
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};
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bool Is64(u64 insn) {
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return Encoding{insn}.int_format == IntFormat::U64;
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}
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int BitSize(FloatFormat format) {
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switch (format) {
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case FloatFormat::F16:
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return 16;
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case FloatFormat::F32:
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return 32;
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case FloatFormat::F64:
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return 64;
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}
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throw NotImplementedException("Invalid float format {}", format);
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}
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IR::U32 SmallAbs(TranslatorVisitor& v, const IR::U32& value, int bitsize) {
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const IR::U32 least_value{v.ir.Imm32(-(1 << (bitsize - 1)))};
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const IR::U32 mask{v.ir.ShiftRightArithmetic(value, v.ir.Imm32(bitsize - 1))};
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const IR::U32 absolute{v.ir.BitwiseXor(v.ir.IAdd(value, mask), mask)};
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const IR::U1 is_least{v.ir.IEqual(value, least_value)};
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return IR::U32{v.ir.Select(is_least, value, absolute)};
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}
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void I2F(TranslatorVisitor& v, u64 insn, IR::U32U64 src) {
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const Encoding i2f{insn};
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if (i2f.cc != 0) {
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throw NotImplementedException("CC");
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}
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const bool is_signed{i2f.is_signed != 0};
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int src_bitsize{};
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switch (i2f.int_format) {
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case IntFormat::U8:
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src = v.ir.BitFieldExtract(src, v.ir.Imm32(static_cast<u32>(i2f.selector) * 8),
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v.ir.Imm32(8), is_signed);
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if (i2f.abs != 0) {
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src = SmallAbs(v, src, 8);
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}
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src_bitsize = 8;
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break;
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case IntFormat::U16:
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if (i2f.selector == 1 || i2f.selector == 3) {
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throw NotImplementedException("Invalid U16 selector {}", i2f.selector.Value());
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}
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src = v.ir.BitFieldExtract(src, v.ir.Imm32(static_cast<u32>(i2f.selector) * 8),
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v.ir.Imm32(16), is_signed);
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if (i2f.abs != 0) {
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src = SmallAbs(v, src, 16);
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}
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src_bitsize = 16;
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break;
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case IntFormat::U32:
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case IntFormat::U64:
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if (i2f.selector != 0) {
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throw NotImplementedException("Unexpected selector {}", i2f.selector.Value());
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}
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if (i2f.abs != 0 && is_signed) {
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src = v.ir.IAbs(src);
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}
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src_bitsize = i2f.int_format == IntFormat::U64 ? 64 : 32;
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break;
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}
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const int conversion_src_bitsize{i2f.int_format == IntFormat::U64 ? 64 : 32};
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const int dst_bitsize{BitSize(i2f.float_format)};
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IR::F16F32F64 value{v.ir.ConvertIToF(dst_bitsize, conversion_src_bitsize, is_signed, src)};
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if (i2f.neg != 0) {
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if (i2f.abs != 0 || !is_signed) {
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// We know the value is positive
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value = v.ir.FPNeg(value);
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} else {
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// Only negate if the input isn't the lowest value
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IR::U1 is_least;
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if (src_bitsize == 64) {
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is_least = v.ir.IEqual(src, v.ir.Imm64(std::numeric_limits<s64>::min()));
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} else {
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const IR::U32 least_value{v.ir.Imm32(-(1 << (src_bitsize - 1)))};
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is_least = v.ir.IEqual(src, least_value);
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}
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value = IR::F16F32F64{v.ir.Select(is_least, value, v.ir.FPNeg(value))};
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}
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}
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switch (i2f.float_format) {
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case FloatFormat::F16: {
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const IR::F16 zero{v.ir.FPConvert(16, v.ir.Imm32(0.0f))};
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v.X(i2f.dest_reg, v.ir.PackFloat2x16(v.ir.CompositeConstruct(value, zero)));
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break;
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}
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case FloatFormat::F32:
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v.F(i2f.dest_reg, value);
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break;
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case FloatFormat::F64: {
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if (!IR::IsAligned(i2f.dest_reg, 2)) {
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throw NotImplementedException("Unaligned destination {}", i2f.dest_reg.Value());
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}
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const IR::Value vector{v.ir.UnpackDouble2x32(value)};
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for (int i = 0; i < 2; ++i) {
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v.X(i2f.dest_reg + i, IR::U32{v.ir.CompositeExtract(vector, i)});
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}
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break;
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}
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default:
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throw NotImplementedException("Invalid float format {}", i2f.float_format.Value());
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}
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}
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} // Anonymous namespace
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void TranslatorVisitor::I2F_reg(u64 insn) {
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if (Is64(insn)) {
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union {
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u64 raw;
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BitField<20, 8, IR::Reg> reg;
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} const value{insn};
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const IR::Value regs{ir.CompositeConstruct(ir.GetReg(value.reg), ir.GetReg(value.reg + 1))};
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I2F(*this, insn, ir.PackUint2x32(regs));
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} else {
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I2F(*this, insn, GetReg20(insn));
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}
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}
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void TranslatorVisitor::I2F_cbuf(u64 insn) {
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if (Is64(insn)) {
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I2F(*this, insn, GetPackedCbuf(insn));
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} else {
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I2F(*this, insn, GetCbuf(insn));
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}
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}
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void TranslatorVisitor::I2F_imm(u64 insn) {
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if (Is64(insn)) {
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I2F(*this, insn, GetPackedImm20(insn));
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} else {
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I2F(*this, insn, GetImm20(insn));
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}
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}
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} // namespace Shader::Maxwell
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