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@ -253,27 +253,27 @@ enum ConditionCode {
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// Flags for use with the APSR.
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enum : u32 {
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NBIT = (1U << 31U),
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ZBIT = (1 << 30),
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CBIT = (1 << 29),
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VBIT = (1 << 28),
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QBIT = (1 << 27),
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JBIT = (1 << 24),
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EBIT = (1 << 9),
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ABIT = (1 << 8),
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IBIT = (1 << 7),
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FBIT = (1 << 6),
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TBIT = (1 << 5),
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// Masks for groups of bits in the APSR.
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MODEBITS = 0x1F,
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INTBITS = 0x1C0,
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NBIT = (1U << 31U),
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ZBIT = (1 << 30),
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CBIT = (1 << 29),
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VBIT = (1 << 28),
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QBIT = (1 << 27),
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JBIT = (1 << 24),
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EBIT = (1 << 9),
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ABIT = (1 << 8),
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IBIT = (1 << 7),
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FBIT = (1 << 6),
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TBIT = (1 << 5),
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// Masks for groups of bits in the APSR.
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MODEBITS = 0x1F,
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INTBITS = 0x1C0,
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};
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// Values for Emulate.
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enum {
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STOP = 0, // Stop
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CHANGEMODE = 1, // Change mode
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ONCE = 2, // Execute just one iteration
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RUN = 3 // Continuous execution
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STOP = 0, // Stop
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CHANGEMODE = 1, // Change mode
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ONCE = 2, // Execute just one iteration
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RUN = 3 // Continuous execution
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};
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