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@ -18,6 +18,29 @@ u32 ShaderIR::DecodeConversion(BasicBlock& bb, u32 pc) {
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const auto opcode = OpCode::Decode(instr);
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switch (opcode->get().GetId()) {
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case OpCode::Id::I2F_R:
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case OpCode::Id::I2F_C: {
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UNIMPLEMENTED_IF(instr.conversion.dest_size != Register::Size::Word);
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UNIMPLEMENTED_IF(instr.conversion.selector);
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UNIMPLEMENTED_IF_MSG(instr.generates_cc,
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"Condition codes generation in I2F is not implemented");
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Node value = [&]() {
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if (instr.is_b_gpr) {
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return GetRegister(instr.gpr20);
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} else {
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return GetConstBuffer(instr.cbuf34.index, instr.cbuf34.offset);
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}
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}();
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const bool input_signed = instr.conversion.is_input_signed;
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value = ConvertIntegerSize(value, instr.conversion.src_size, input_signed);
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value = GetOperandAbsNegInteger(value, instr.conversion.abs_a, false, input_signed);
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value = SignedOperation(OperationCode::FCastInteger, input_signed, PRECISE, value);
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value = GetOperandAbsNegFloat(value, false, instr.conversion.negate_a);
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SetRegister(bb, instr.gpr0, value);
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break;
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}
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case OpCode::Id::F2F_R: {
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UNIMPLEMENTED_IF(instr.conversion.dest_size != Register::Size::Word);
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UNIMPLEMENTED_IF(instr.conversion.src_size != Register::Size::Word);
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