mirror of https://github.com/yuzu-mirror/yuzu
shader: Implement FLO
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e038928616
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103b9da4f7
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// Copyright 2021 yuzu Emulator Project
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// Licensed under GPLv2 or any later version
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// Refer to the license.txt file included.
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#include "common/bit_field.h"
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#include "common/common_types.h"
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#include "shader_recompiler/frontend/maxwell/translate/impl/impl.h"
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namespace Shader::Maxwell {
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namespace {
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void FLO(TranslatorVisitor& v, u64 insn, const IR::U32& src) {
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union {
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u64 insn;
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BitField<0, 8, IR::Reg> dest_reg;
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BitField<40, 1, u64> tilde;
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BitField<41, 1, u64> shift;
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BitField<48, 1, u64> is_signed;
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} const flo{insn};
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const bool invert{flo.tilde != 0};
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const bool is_signed{flo.is_signed != 0};
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const bool shift_op{flo.shift != 0};
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const IR::U32 operand{invert ? v.ir.BitwiseNot(src) : src};
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const IR::U32 find_result{is_signed ? v.ir.FindSMsb(operand) : v.ir.FindUMsb(operand)};
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const IR::U1 find_fail{v.ir.IEqual(find_result, v.ir.Imm32(-1))};
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const IR::U32 offset{v.ir.Imm32(31)};
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const IR::U32 success_result{shift_op ? IR::U32{v.ir.ISub(offset, find_result)} : find_result};
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const IR::U32 result{v.ir.Select(find_fail, find_result, success_result)};
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v.X(flo.dest_reg, result);
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}
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} // Anonymous namespace
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void TranslatorVisitor::FLO_reg(u64 insn) {
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FLO(*this, insn, GetReg20(insn));
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}
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void TranslatorVisitor::FLO_cbuf(u64 insn) {
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FLO(*this, insn, GetCbuf(insn));
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}
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void TranslatorVisitor::FLO_imm(u64 insn) {
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FLO(*this, insn, GetImm20(insn));
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}
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} // namespace Shader::Maxwell
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