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@ -170,7 +170,10 @@ ALWAYS_INLINE static u32 GetRAMCodePageIndex(PhysicalMemoryAddress address)
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}
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/// Returns true if the specified page contains code.
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bool IsRAMCodePage(u32 index);
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ALWAYS_INLINE static bool IsRAMCodePage(u32 index)
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{
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return g_ram_code_bits[index];
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}
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/// Flags a RAM region as code, so we know when to invalidate blocks.
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void SetRAMCodePage(u32 index);
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@ -188,7 +191,7 @@ bool IsCodePageAddress(PhysicalMemoryAddress address);
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bool HasCodePagesInRange(PhysicalMemoryAddress start_address, u32 size);
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/// Returns the number of cycles stolen by DMA RAM access.
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ALWAYS_INLINE TickCount GetDMARAMTickCount(u32 word_count)
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ALWAYS_INLINE static TickCount GetDMARAMTickCount(u32 word_count)
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{
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// DMA is using DRAM Hyper Page mode, allowing it to access DRAM rows at 1 clock cycle per word (effectively around
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// 17 clks per 16 words, due to required row address loading, probably plus some further minimal overload due to
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