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@ -45,8 +45,13 @@ LOG_CHANNEL(GPU);
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std::unique_ptr<GPU> g_gpu;
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// aligning VRAM to 4K is fine, since the ARM64 instructions compute 4K page aligned addresses
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// TOOD: REMOVE ME
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alignas(4096) u16 g_vram[VRAM_SIZE / sizeof(u16)];
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// or it would be, except we want to import the memory for readbacks on metal..
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#ifdef DYNAMIC_HOST_PAGE_SIZE
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#define VRAM_STORAGE_ALIGNMENT MIN_HOST_PAGE_SIZE
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#else
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#define VRAM_STORAGE_ALIGNMENT HOST_PAGE_SIZE
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#endif
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alignas(VRAM_STORAGE_ALIGNMENT) u16 g_vram[VRAM_SIZE / sizeof(u16)];
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u16 g_gpu_clut[GPU_CLUT_SIZE];
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const GPU::GP0CommandHandlerTable GPU::s_GP0_command_handler_table = GPU::GenerateGP0CommandHandlerTable();
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