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@ -21,23 +21,20 @@ bool CodeGenerator::CompileBlock(CodeBlock* block, CodeBlock::HostCodePointer* o
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m_block = block;
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m_block_start = block->instructions.data();
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m_block_end = block->instructions.data() + block->instructions.size();
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m_pc = block->GetPC();
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m_pc_valid = true;
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EmitBeginBlock();
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m_fastmem_load_base_in_register = false;
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m_fastmem_store_base_in_register = false;
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EmitBeginBlock(true);
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BlockPrologue();
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const CodeBlockInstruction* cbi = m_block_start;
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while (cbi != m_block_end)
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m_current_instruction = m_block_start;
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while (m_current_instruction != m_block_end)
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{
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#ifdef _DEBUG
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SmallString disasm;
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DisassembleInstruction(&disasm, cbi->pc, cbi->instruction.bits);
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Log_DebugPrintf("Compiling instruction '%s'", disasm.GetCharArray());
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#endif
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m_current_instruction = cbi;
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if (!CompileInstruction(*cbi))
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if (!CompileInstruction(*m_current_instruction))
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{
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m_current_instruction = nullptr;
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m_block_end = nullptr;
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@ -46,11 +43,14 @@ bool CodeGenerator::CompileBlock(CodeBlock* block, CodeBlock::HostCodePointer* o
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return false;
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}
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cbi++;
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m_current_instruction++;
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}
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BlockEpilogue();
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EmitEndBlock();
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if (!m_block_linked)
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{
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BlockEpilogue();
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EmitEndBlock(true, true);
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}
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FinalizeBlock(out_host_code, out_host_code_size);
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Log_ProfilePrintf("JIT block 0x%08X: %zu instructions (%u bytes), %u host bytes", block->GetPC(),
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@ -957,6 +957,10 @@ void CodeGenerator::BlockPrologue()
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EmitStoreCPUStructField(offsetof(State, exception_raised), Value::FromConstantU8(0));
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#if 0
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EmitFunctionCall(nullptr, &Thunks::LogPC, Value::FromConstantU32(m_pc));
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#endif
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if (m_block->uncached_fetch_ticks > 0 || m_block->icache_line_count > 0)
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EmitICacheCheckAndUpdate();
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@ -2184,7 +2188,10 @@ bool CodeGenerator::Compile_Branch(const CodeBlockInstruction& cbi)
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{
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InstructionPrologue(cbi, 1);
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auto DoBranch = [this](Condition condition, const Value& lhs, const Value& rhs, Reg lr_reg, Value&& branch_target) {
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auto DoBranch = [this, &cbi](Condition condition, const Value& lhs, const Value& rhs, Reg lr_reg,
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Value&& branch_target) {
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const bool can_link_block = cbi.is_direct_branch_instruction && g_settings.cpu_recompiler_block_linking;
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// ensure the lr register is flushed, since we want it's correct value after the branch
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// we don't want to invalidate it yet because of "jalr r0, r0", branch_target could be the lr_reg.
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if (lr_reg != Reg::count && lr_reg != Reg::zero)
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@ -2199,16 +2206,58 @@ bool CodeGenerator::Compile_Branch(const CodeBlockInstruction& cbi)
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EmitCopyValue(next_pc.GetHostRegister(), CalculatePC(4));
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}
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LabelType branch_not_taken;
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Value take_branch;
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LabelType branch_taken, branch_not_taken;
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if (condition != Condition::Always)
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{
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// condition is inverted because we want the case for skipping it
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if (lhs.IsValid() && rhs.IsValid())
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EmitConditionalBranch(condition, true, lhs.host_reg, rhs, &branch_not_taken);
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else if (lhs.IsValid())
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EmitConditionalBranch(condition, true, lhs.host_reg, lhs.size, &branch_not_taken);
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if (!can_link_block)
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{
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// condition is inverted because we want the case for skipping it
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if (lhs.IsValid() && rhs.IsValid())
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EmitConditionalBranch(condition, true, lhs.host_reg, rhs, &branch_not_taken);
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else if (lhs.IsValid())
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EmitConditionalBranch(condition, true, lhs.host_reg, lhs.size, &branch_not_taken);
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else
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EmitConditionalBranch(condition, true, &branch_not_taken);
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}
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else
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EmitConditionalBranch(condition, true, &branch_not_taken);
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{
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take_branch = m_register_cache.AllocateScratch(RegSize_32);
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switch (condition)
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{
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case Condition::NotEqual:
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case Condition::Equal:
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case Condition::Overflow:
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case Condition::Greater:
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case Condition::GreaterEqual:
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case Condition::LessEqual:
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case Condition::Less:
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case Condition::Above:
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case Condition::AboveEqual:
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case Condition::Below:
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case Condition::BelowEqual:
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{
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EmitCmp(lhs.GetHostRegister(), rhs);
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EmitSetConditionResult(take_branch.GetHostRegister(), take_branch.size, condition);
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}
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break;
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case Condition::Negative:
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case Condition::PositiveOrZero:
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case Condition::NotZero:
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case Condition::Zero:
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{
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Assert(!rhs.IsValid() || (rhs.IsConstant() && rhs.GetS64ConstantValue() == 0));
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EmitTest(lhs.GetHostRegister(), lhs);
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EmitSetConditionResult(take_branch.GetHostRegister(), take_branch.size, condition);
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}
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break;
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default:
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UnreachableCode();
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break;
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}
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}
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}
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// save the old PC if we want to
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@ -2218,6 +2267,9 @@ bool CodeGenerator::Compile_Branch(const CodeBlockInstruction& cbi)
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// if we don't cancel it, at the end of the instruction the value we write can be overridden.
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EmitCancelInterpreterLoadDelayForReg(lr_reg);
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EmitStoreGuestRegister(lr_reg, next_pc);
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// now invalidate lr because it was possibly written in the branch
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m_register_cache.InvalidateGuestRegister(lr_reg);
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}
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// we don't need to test the address of constant branches unless they're definitely misaligned, which would be
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@ -2256,24 +2308,125 @@ bool CodeGenerator::Compile_Branch(const CodeBlockInstruction& cbi)
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m_register_cache.PopState();
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}
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if (condition != Condition::Always)
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if (can_link_block)
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{
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// branch taken path - modify the next pc
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EmitCopyValue(next_pc.GetHostRegister(), branch_target);
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// if it's an in-block branch, compile the delay slot now
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// TODO: Make this more optimal by moving the condition down if it's a nop
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Assert((m_current_instruction + 1) != m_block_end);
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InstructionEpilogue(cbi);
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m_current_instruction++;
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if (!CompileInstruction(*m_current_instruction))
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return false;
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// flush all regs since we're at the end of the block now
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BlockEpilogue();
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m_block_linked = true;
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// check downcount
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Value pending_ticks = m_register_cache.AllocateScratch(RegSize_32);
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Value downcount = m_register_cache.AllocateScratch(RegSize_32);
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EmitLoadCPUStructField(pending_ticks.GetHostRegister(), RegSize_32, offsetof(State, pending_ticks));
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EmitLoadCPUStructField(downcount.GetHostRegister(), RegSize_32, offsetof(State, downcount));
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// pending < downcount
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LabelType return_to_dispatcher;
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// converge point
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EmitBindLabel(&branch_not_taken);
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WriteNewPC(next_pc, true);
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if (condition != Condition::Always)
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{
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EmitBranchIfBitClear(take_branch.GetHostRegister(), take_branch.size, 0, &branch_not_taken);
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m_register_cache.PushState();
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{
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WriteNewPC(branch_target, false);
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EmitConditionalBranch(Condition::GreaterEqual, false, pending_ticks.GetHostRegister(), downcount,
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&return_to_dispatcher);
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// we're committed at this point :D
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EmitStoreCPUStructField(offsetof(State, current_instruction_pc), branch_target);
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EmitEndBlock(true, false);
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const void* jump_pointer = GetCurrentCodePointer();
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const void* resolve_pointer = GetCurrentFarCodePointer();
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EmitBranch(resolve_pointer);
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const u32 jump_size = static_cast<u32>(static_cast<const char*>(GetCurrentCodePointer()) -
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static_cast<const char*>(jump_pointer));
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SwitchToFarCode();
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EmitBeginBlock(true);
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EmitFunctionCall(nullptr, &CPU::Recompiler::Thunks::ResolveBranch, Value::FromConstantPtr(m_block),
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Value::FromConstantPtr(jump_pointer), Value::FromConstantPtr(resolve_pointer),
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Value::FromConstantU32(jump_size));
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EmitEndBlock(true, true);
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}
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m_register_cache.PopState();
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SwitchToNearCode();
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EmitBindLabel(&branch_not_taken);
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}
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m_register_cache.PushState();
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if (condition != Condition::Always)
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{
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WriteNewPC(next_pc, true);
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EmitStoreCPUStructField(offsetof(State, current_instruction_pc), next_pc);
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}
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else
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{
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WriteNewPC(branch_target, true);
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EmitStoreCPUStructField(offsetof(State, current_instruction_pc), branch_target);
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}
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EmitConditionalBranch(Condition::GreaterEqual, false, pending_ticks.GetHostRegister(), downcount,
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&return_to_dispatcher);
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if (condition != Condition::Always)
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EmitStoreCPUStructField(offsetof(State, current_instruction_pc), next_pc);
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else
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EmitStoreCPUStructField(offsetof(State, current_instruction_pc), branch_target);
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EmitEndBlock(true, false);
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const void* jump_pointer = GetCurrentCodePointer();
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const void* resolve_pointer = GetCurrentFarCodePointer();
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EmitBranch(GetCurrentFarCodePointer());
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const u32 jump_size =
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static_cast<u32>(static_cast<const char*>(GetCurrentCodePointer()) - static_cast<const char*>(jump_pointer));
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SwitchToFarCode();
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EmitBeginBlock(true);
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EmitFunctionCall(nullptr, &CPU::Recompiler::Thunks::ResolveBranch, Value::FromConstantPtr(m_block),
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Value::FromConstantPtr(jump_pointer), Value::FromConstantPtr(resolve_pointer),
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Value::FromConstantU32(jump_size));
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EmitEndBlock(true, true);
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m_register_cache.PopState();
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SwitchToNearCode();
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EmitBindLabel(&return_to_dispatcher);
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EmitEndBlock(true, true);
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}
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else
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{
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// next_pc is not used for unconditional branches
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WriteNewPC(branch_target, true);
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if (condition != Condition::Always)
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{
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// branch taken path - modify the next pc
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EmitBindLabel(&branch_taken);
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EmitCopyValue(next_pc.GetHostRegister(), branch_target);
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// converge point
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EmitBindLabel(&branch_not_taken);
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WriteNewPC(next_pc, true);
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}
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else
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{
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// next_pc is not used for unconditional branches
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WriteNewPC(branch_target, true);
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}
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InstructionEpilogue(cbi);
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}
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// now invalidate lr becuase it was possibly written in the branch
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if (lr_reg != Reg::count && lr_reg != Reg::zero)
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m_register_cache.InvalidateGuestRegister(lr_reg);
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return true;
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};
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// Compute the branch target.
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@ -2287,10 +2440,9 @@ bool CodeGenerator::Compile_Branch(const CodeBlockInstruction& cbi)
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Value branch_target = OrValues(AndValues(CalculatePC(), Value::FromConstantU32(0xF0000000)),
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Value::FromConstantU32(cbi.instruction.j.target << 2));
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DoBranch(Condition::Always, Value(), Value(), (cbi.instruction.op == InstructionOp::jal) ? Reg::ra : Reg::count,
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std::move(branch_target));
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return DoBranch(Condition::Always, Value(), Value(),
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(cbi.instruction.op == InstructionOp::jal) ? Reg::ra : Reg::count, std::move(branch_target));
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}
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break;
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case InstructionOp::funct:
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{
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@ -2298,9 +2450,9 @@ bool CodeGenerator::Compile_Branch(const CodeBlockInstruction& cbi)
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{
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// npc = rs, link to rt
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Value branch_target = m_register_cache.ReadGuestRegister(cbi.instruction.r.rs);
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DoBranch(Condition::Always, Value(), Value(),
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(cbi.instruction.r.funct == InstructionFunct::jalr) ? cbi.instruction.r.rd : Reg::count,
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std::move(branch_target));
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return DoBranch(Condition::Always, Value(), Value(),
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(cbi.instruction.r.funct == InstructionFunct::jalr) ? cbi.instruction.r.rd : Reg::count,
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std::move(branch_target));
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}
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else if (cbi.instruction.r.funct == InstructionFunct::syscall ||
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cbi.instruction.r.funct == InstructionFunct::break_)
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@ -2308,13 +2460,15 @@ bool CodeGenerator::Compile_Branch(const CodeBlockInstruction& cbi)
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const Exception excode =
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(cbi.instruction.r.funct == InstructionFunct::syscall) ? Exception::Syscall : Exception::BP;
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GenerateExceptionExit(cbi, excode);
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InstructionEpilogue(cbi);
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return true;
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}
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else
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{
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UnreachableCode();
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return false;
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}
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}
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break;
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case InstructionOp::beq:
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case InstructionOp::bne:
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@ -2326,7 +2480,7 @@ bool CodeGenerator::Compile_Branch(const CodeBlockInstruction& cbi)
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if (cbi.instruction.op == InstructionOp::beq && cbi.instruction.i.rs == Reg::zero &&
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cbi.instruction.i.rt == Reg::zero)
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{
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DoBranch(Condition::Always, Value(), Value(), Reg::count, std::move(branch_target));
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return DoBranch(Condition::Always, Value(), Value(), Reg::count, std::move(branch_target));
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}
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else
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{
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@ -2334,10 +2488,9 @@ bool CodeGenerator::Compile_Branch(const CodeBlockInstruction& cbi)
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Value lhs = m_register_cache.ReadGuestRegister(cbi.instruction.i.rs, true, true);
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Value rhs = m_register_cache.ReadGuestRegister(cbi.instruction.i.rt);
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const Condition condition = (cbi.instruction.op == InstructionOp::beq) ? Condition::Equal : Condition::NotEqual;
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DoBranch(condition, lhs, rhs, Reg::count, std::move(branch_target));
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return DoBranch(condition, lhs, rhs, Reg::count, std::move(branch_target));
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}
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}
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break;
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case InstructionOp::bgtz:
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case InstructionOp::blez:
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@ -2350,9 +2503,8 @@ bool CodeGenerator::Compile_Branch(const CodeBlockInstruction& cbi)
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const Condition condition =
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(cbi.instruction.op == InstructionOp::bgtz) ? Condition::Greater : Condition::LessEqual;
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DoBranch(condition, lhs, Value::FromConstantU32(0), Reg::count, std::move(branch_target));
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return DoBranch(condition, lhs, Value::FromConstantU32(0), Reg::count, std::move(branch_target));
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}
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break;
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case InstructionOp::b:
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{
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@ -2378,17 +2530,13 @@ bool CodeGenerator::Compile_Branch(const CodeBlockInstruction& cbi)
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m_register_cache.WriteGuestRegister(Reg::ra, CalculatePC(4));
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}
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DoBranch(condition, lhs, Value(), Reg::count, std::move(branch_target));
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return DoBranch(condition, lhs, Value(), Reg::count, std::move(branch_target));
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}
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break;
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default:
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UnreachableCode();
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break;
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return false;
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}
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InstructionEpilogue(cbi);
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return true;
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}
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bool CodeGenerator::Compile_lui(const CodeBlockInstruction& cbi)
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Connor McLaughlin
4 years ago